Ultra Low Power CORDIC Processor for Wireless Communication Algorithms
نویسندگان
چکیده
We designed and implemented an ultra low power CORDIC processor which targets the implementation We propose a modified CORDIC algorithm and architecture. and we elaborate on the low power architectural and algorithmic techniques for minimizing its power consumption. Our CORDIC implementation consumes. in rotate mode, on average 50 Jl, W @ 10 MHz under 1 V supply voltage in a .25 Jl,m technology.
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ورودعنوان ژورنال:
- VLSI Signal Processing
دوره 38 شماره
صفحات -
تاریخ انتشار 2004